Code generation issues in compiler design
- #Code generation issues in compiler design generator
- #Code generation issues in compiler design plus
- #Code generation issues in compiler design free
Also, it decides the registers to be used to keep these values.
#Code generation issues in compiler design generator
Code generator decides what values to keep in the registers.The target machine’s architecture may not allow all of the values to be kept in the CPU memory or registers.A program has a number of values to be maintained during the execution.Here the fourth statement is redundant, and so is the third statement if Inefficient assembly code is: MOV b, R0 R0 ← b The uniformity and completeness of the instruction set. The factors to be considered during instruction selection are: One representation can have many ways (instructions) to convert it, so it becomes the responsibility of the code generator to choose the appropriate instructions wisely.The code generator takes Intermediate Representation as input and converts (maps) it into target machine’s instruction set.The instruction should be chosen in such a way that speed is of execution is minimum or other machine related resource utilization should be minimum.The code generator should choose the most appropriate instruction.Sometimes a single operation may be implemented using many instruction (many set of instructions).The instruction set should be complete in the sense that all operations can be implemented.The address of the specific instruction (in three address code) can be generated using back patching Each identifier can be accessed in symbol table based on width of each identifier and offset.The identifiers are stored in symbol table during declaration of variables or functions, along with type.These addresses are based on the runtime environment used like static, stack or heap.Address mapping defines the mapping between intermediate representations to address in the target code.
#Code generation issues in compiler design plus
Index addressing mode- this is of the form C(R) where the address of operand is at the location C+Contents(R)Įxample: MOV 4(R0), M the operand is located at address = contents (4+contents (R0))Ĭost of instruction is defined as cost of execution plus the number of memory access. Immediate addressing mode – The operand value appears in the instruction.ĭ. Register addressing mode where both the operands are in register.Ĭ. MOV R0, M moves the contents of register R0 to memory location M.ī. Target Machine supports for the following addressing modesĮxample: MOV R0, M where M is the address of memory location of one of the operands. Producing an assembly language program as output makes the process of code generation somewhat easier. If the target machine does not handle relocation automatically, the compiler must provide explicit relocation information to the loader, to link the separately compiled program segments. A set of relocatable object modules can be linked together and loaded for execution by a linking loader. Producing a relocatable machine language program as output allows subprograms to be compiled separately. Producing an absolute machine language program as output has the advantage that it can be placed in a fixed location in memory and immediately executed.Re-locatable code provides great deal of flexibilities as the functions can be compiled separately before generation of object code. If it generates assembly level code then assemblers are needed to convert it into machine level code before execution.But in case of re-locatable it requires linker and loader to place the code in appropriate location and map (link) the required library functions.Absolute code can be executed immediately as the addresses are fixed.The target code may be absolute code, re-locatable machine code or assembly language code.The target machine can have either CISC or RISC processor architecture.That language may facilitate some machine-specific instructions to help the compiler generate the code in a more convenient way.The code generator has to be aware of the nature of the target language for which the code is to be transformed.
#Code generation issues in compiler design free